Session Index

S5. III-N Heterostructure Characterization

Poster Session
Tuesday, Nov. 11, 2025  15:00-17:00
Room: Multifunction Room

Manuscript ID.  0035
Paper No.  2025-Tue-P0501-P001
Ho, Ai Comparison of n-Ga₂O₃/p-GaN PN Heterojunction Diode Grown by TMGa and TEGa

Ho, Ai, Chun-Kai Huang, Institute of Pioneer Semiconductor Innovation, National Yang Ming Chiao Tung University, Hsinchu 300, Taiwan; Sheng-Ti Chung, Ray-Hua Horng, Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu 300, Taiwan

This study compares β-Ga₂O₃ PN heterojunctions grown using TMGa and TEGa sources. Devices were fabricated with identical metal contacts and annealing parameters, and evaluated for their electrical characteristics. TMGa-grown devices showed higher on/off ratio and higher breakdown voltage, while TEGa-grown structures demonstrated superior ideality factors. The results highlight trade-offs between precursor choice and Ga₂O₃ device performance.

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Manuscript ID.  0036
Paper No.  2025-Tue-P0501-P002
Chang Hao-Wei Effect of Post-Deposition Annealing on Room-Temperature Sputtered NiO Gate Dielectric for AlGaN/GaN HEMTs

Hao-Wei Chang, 0965003491; Po-Chuan Liao, qwert61004.ee12@nycu.edu.tw; Ray-Hua Horng, rayhua@nycu.edu.tw

This study investigates the integration of nickel oxide (NiO), deposited 100 nm at room temperature by sputtering, as the gate dielectric in AlGaN/GaN high electron mobility transistors (HEMTs). Devices were fabricated with post-deposition annealing (PDA) at various temperatures (600 °C, 700 °C, 800 °C). Electrical characteristics including threshold voltage (Vth), transconductance (gm), breakdown voltage, and mobility were analyzed. The device annealed at 700 °C exhibited the highest gm,max (57.35 mS/mm), improved Vth (−1.79 V), and breakdown voltage (~1103 V). The results indicate annealing NiO deposition enhances device performance, positioning room-temperature NiO as a viable gate dielectric for high-performance GaN-based electronics.

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